In recent years, getting larger capacities of information communication equipment leads increases of speed of signals or sizes of equipment and causes higher frequencies of power supply noise or multi-purposing of resonance modes in the inside of the equipment, thus having become hard to conform to EMI regulations such as Voluntary Control Council for Interference by Information Technology Equipment (VCCI).
As described below, while EMI reduction techniques have been proposed, EMI emissions have not been solved.
PTL1 (Japanese Unexamined Patent Application Publication No. 2013-254759) discloses a technique that a square ring-shaped GND wiring is arranged along the periphery of a circuit board and is connected to a GND layer in the board by a plurality of GND via holes (paragraphs [0014] to [0019], FIG. 1 etc. in PTL1). Although there are some effects for suppressing EMI by arranging the GND via holes, the effects are insufficient to block electromagnetic waves, because a great gap is presence due to the GND wiring shaped in the square ring, which the electromagnetic waves are leaked from the gap.
In addition, PTL2 (Japanese Unexamined Patent Application Publication No. H10-270862) and PTL3 (Japanese Unexamined Patent Application Publication No. 2001-53449) disclose techniques that impedance with an external power supply is increased by allowing power feeding wirings of large scale integrations (LSIs) to have inductors, thus suppressing propagation of the power supply noise to the outside (paragraphs [0023], [0025], FIGS. 2, 3 in PTL2, paragraphs [0036] to [0037], FIGS. 2, 3 in PTL3). However, the power supply noise propagates the electromagnetic waves to its circumference through between the power supply and GND as if a transmission path, so that it is hard to fundamentally suppress EMI.
In addition, PTL4 (Japanese Unexamined Patent Application Publication No. H11-220263) describes a printed wiring board for promoting the reduction of electromagnetic waves noise. The printed wiring board 1 is provided with, as middle layers, signal layers 3 on which signal patterns 2 are wired and power supply layers 5 on which power supply patterns 4 are wired. The signal layers 3 and power supply layers 5 are embedded in insulating stuff 6. On one surface (upper surface) and the opposite surface (lower surface) of the printed wiring board 1, ground patterns 7 and 8 are disposed, respectively. The ground patterns of the one surface and the opposite surface are connected by through holes 11 throughout the entire printed wiring board 1 (paragraphs [0008] to [0011], FIG. 1, FIG. 2). Further, to prevent electromagnetic noise by forming a square ring-shaped ground pattern around the signal layers and the power supply layers is also described (paragraphs [0020] to [0024], FIGS. 13, 14).
In addition, PTL5 (Japanese Unexamined Patent Application Publication No. 2007-234500) describes a technique for blocking the electromagnetic waves from signal wirings formed on a flexible board. Ground patterns are formed on both one surface and the opposite surface of a base 11 on which a plurality of high speed transmission paths (signal wirings) are arranged, and these two ground patterns are connected by a plurality of through holes 1s (paragraphs [0048] to [0053], FIGS. 1, 3, 5). Further, PTL 5 also describes that each of intervals between the plurality of the through holes 1s is equal to or below a half wavelength of a specific electromagnetic wave, thus blocking the electromagnetic waves having the wavelengths equal to or more the specific electromagnetic wave (paragraph [0063]).